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Data Sheet No. PD60294
IRS21853SPBF
DUAL HIGH SIDE DRIVER IC
Features
* * * * * * Gate drive supply range from 10 V to 20 V Under voltage lockout for VCC & VBS1,2 5 V input logic compatible Tolerant to negative transient voltage Matched propagation delays for all channels RoHS compliant
Product Summary
VOFFSET VOUT ton/toff (typ) Io+/600 V max 10 V to 20 V 170 ns/170 ns 2 A/2 A 40 ns
Descriptions
The IRS21853 is a high voltage, high speed power MOSFET and IGBT dual high-side driver with propagation delay matched output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The floating logic input is compatible with standard CMOS or LSTTL output, down to 3.3 V logic and can be operated up to 600 V above the ground. The output driver features a high pulse current buffer stage designed for minimum driver crossconduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side configuration, which operates up to 600 V.
Delay Matching
Package
16-Lead SOIC (narrow body)
Typical Connection Diagram
1 2 3 4 5 6 7 8 VCC COM H IN 1 H IN 2
V B1 HO1 V S1
16 15 14 13 12 11 10 9
+V D C 1
IR S21853 S O N 16
V S2 HO2 V B2
+VD C 2
IRS21853SPBF
Typical Connection Diagram for ER Circuit in PDP
1 2 3 4 5 6 7 8 VCC COM HIN1 HIN2
VB1 HO1 VS1
16 15 14 13 12 11 10 9
C ERC L ER
C
Cp
IRS21853 SON16
VS2 HO2 VB2
2
IRS21853SPBF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. parameters are absolute voltages referenced to COM. All voltage
Symbol VCC VIN VB1,2 VS1,2 VHO1,2 dVS/dt PD RJA TJ TS TL
Note1:
Definition Low side supply voltage Logic input voltage (HIN1,2) High side floating well supply voltage High side floating well supply return voltage Floating gate drive output voltage Allowable VS1,2 offset supply transient relative to COM Package power dissipation @ TA +25 C Thermal resistance, junction to ambient Junction temperature Storage temperature Lead temperature (soldering, 10 seconds)
Min -0.3 COM-0.3 -0.3 VB1,2-20 VS1,2-0.3 -55 -
Max 20 (Note1) VCC +0.3 620 (Note1) VBn+0.3 VBn+0.3 50 1.25 100 150 300
Units
V
V/ns W C/W C
All supplies are fully tested at 25 V. An internal 20 V clamp exists for each supply.
Recommended Operating Conditions
For proper operation, the device should be used within the recommended conditions. All voltage parameters are absolute voltages referenced to COM. The offset rating are tested with supplies of (VCC-COM)=(VB1,2-VS1,2)=15 V.
Symbol
VCC VIN VB1,2 VS1,2 VHO1,2 TA
Note 2: Note 3:
Definition Low side supply voltage HIN1, 2 input voltage High side floating well supply voltage High side floating well supply offset voltage Floating gate drive output voltage Ambient temperature
Min 10 COM VS1,2+10 Note 2 VS1,2 -40
Max 20 VCC VS1,2+20 600 VB1,2 125
Units
V
C
VS1,2 and VB1,2 voltages will be tolerant to short negative transient spikes. These will be defined and specified in the future. Logic operation for VS of -5 V to 600 V. Logic state held for VS of -5 V to -VBS1,2. (Please refer to Design Tip DT97-3 for more details).
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IRS21853SPBF
Static Electrical Characteristics
(VCC-COM)=(VB1,2-VS1,2)=15 V. TA = 25 oC unless otherwise specified. The VIN, VIN,TH, and IIN parameters are referenced to COM. The VO and IO parameters are referenced to respective VS1,2 and are applicable to the respective output leads HO1,2. The VCCUV parameters are referenced to COM. The VBSUV1,2 parameters are referenced to VS1,2.
Symbol
VCCUV+ VCCUVVBSUV+ VBSUVILK1,2 IQBS IQCC VIH VIL VOH VOL IIN+ IINIo+ Io-
Definition
VCC supply undervoltage positive going threshold VCC supply undervoltage negative going threshold VBS1,2 supply undervoltage positive going threshold VBS1,2 supply undervoltage negative going threshold High-side floating well offset supply leakage current Quiescent VBS supply current Quiescent VCC supply current Logic "1" input voltage Logic "0" input voltage HO1,2 high level output voltage, VBIAS-VO HO1,2 low level output voltage, VO Logic "1" input bias current Logic "0" input bias current Output high short circuit pulsed current HO1,2 Output low short circuit pulsed current HO1,2
Min
8.0 7.4 8.0 7.4 ------3.5 ---------------
Typ
8.9 8.2 8.9 8.2 --75 110 --------5 --2 2
Max Units
9.8 9.0 V 9.8 9.0 50 150 220 --0.6 1.4 0.0 6 20 A 5 --A --V A
Test Conditions
VB1,2 = VS1,2 = 600 V HIN1,2 = 0 V or 5 V
Io= 0 A Io=20 mA VHIN1,2=5 V VHIN1,2=0 V VO=0 V,VIN=0 V, PW<=10 s VO=15 V,VIN=5 V, PW<=10 s
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IRS21853SPBF
Dynamic Electrical Characteristics (All values are target data)
(VCC-COM)= (VB1,2-VS1,2)=15 V. TA = 25 oC unless otherwise specified. CL = 1000 pF unless otherwise specified. All parameters are reference to COM.
Symbol
ton toff tr tf MT
Definition
Turn-on propagation delay (HO1,2) Turn-off propagation delay (HO1,2) Turn-on rise time Turn-off fall time Delay matching (Note 1)
Min
-----------
Typ
170 170 15 15 ---
Max
----50 50 40
Units
Test Conditions
(Vs1,2-COM)=0 V (Vs1,2-COM)=600 V
ns
Note 4:Max(ton,HO1, ton,HO2)- Min(ton,HO1, ton,HO2); Max(toff,HO1, toff,HO2)- Min(toff,HO1, toff,HO2)
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IRS21853SPBF
Functional Block Diagram
VCC 5V VREG
VCCUV DETECT
COM
HIGHSIDE CHANNLE1
VB1
HIN1
PULSE GEN
LEVEL SHIFT UP
FILTER, LATCH UV DETECT
DRIVER
HO1
VS1
HIGHSIDE CHANNEL2
VB2
HIN2
PULSE GEN
LEVEL SHIFT UP
FILTER, LATCH UV DETECT
DRIVER
HO2
VS2
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IRS21853SPBF
Lead Definitions
Symbol
VCC COM VB1,2 HO1,2 VS1,2 HIN1,2
Description
Low side supply voltage Ground High side gate drive floating supply High side driver outputs High voltage floating supply return Logic inputs for high side gate driver outputs (in phase)
Lead Assignments
1 2 VCC COM HIN1 HIN2 3 4 5 6 7 8 IRS21853 SONIC16
16 15 14 13 12 11 10 9
VB1 HO1 VS1
VS2 HO2 VB2
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IRS21853SPBF
50% IN t on tr
50%
t off
tf
OUT
90% 10%
90% 10%
Figure 1: Switching Time Waveforms
HIN1,2
HO1,2
Figure 2: Input/Output Timing Diagram
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IRS21853SPBF
500 Turn-On Delay Time (ns) 400 300 200 100 0 -50
Typ.
500
Turn-On Delay Time (ns)
400
300
Typ.
200
100
0
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature (oC) Figure 3A. Turn-On Tim e vs. Tem perature
VBIAS Supply Voltage (V) Figure 3B. Turn-On Tim e vs. Supply Voltage
500 Turn-Off Time (ns) Turn-Off Time (ns) 400 300 200
Typ.
500 400 300
Typ.
200 100 0
100 0 -50
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature (oC) Figure 4A. Turn-Off Tim e vs. Tem perature
VBIAS Supply Voltage (V) Figure 4B. Turn-Off Tim e vs. Supply Voltage
60 Turn-On Rise Time (ns)
Turn-On Rise Time (ns)
60
40
40
20
Typ.
20
Typ.
0 -50
0
-25
0
25
50
o
75
100
125
10
12
14
16
18
20
Temperature ( C) Figure 5A. Turn-On Rise Tim e vs.Tem perature
VBIAS Supply Voltage (V) Figure 5B. Turn-On Rise Tim e vs. Supply Voltage
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IRS21853SPBF
60 Turn-Off Fall Time (ns)
60
40
Turn-Off Fall Time (ns)
40
20
Typ.
20
Typ.
0 -50
-25
0
25
50
75
100
125
0 10 12 14 16 18 20
Temperature (oC) Figure 6A. Turn-Off Fall Tim e vs. Tem perature
VBIAS Supply Voltage (V) Figure 6B. Turn-Off Fall Tim e vs. Supply Voltage
6 5 Input Voltage (V)
Input Voltage (V)
6 5 4 3 2 1
Min.
4 3 2 1 -50
Mi n.
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature (oC) Figure 7A. Logic "1" Input Voltage vs. Tem perature
Vcc Supply Voltage (V) Figure 7B. Logic "1" Input Voltage vs. Supply Voltage
4 3 2 1
4
Input Voltage (V)
Input Voltage (V)
Max.
3
2
1
Max
0 -50
0 -25 0 25 50
o
75
100
125
10
12
14
16
18
20
Temperature ( C) Figure 8A. Logic "0" Input Voltage vs. Tem perature
Vcc Supply Voltage (V) Figure 8B. Logic "0" Input Voltage vs. Supply Voltage
10
IRS21853SPBF
2.0 High Level Output Voltage (V) 1.5
Max.
2.0 High Level Output Voltage (V) 1.5
Max.
1.0 0.5 0.0 -50
1.0 0.5 0.0
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature (oC) Figure 9A. High Level Output vs. Tem perature
Vcc Supply Voltage (V) Figure 9B. High Level Output vs. Supply Voltage
0.20 Low Level Output Voltage (V) 0.15 0.10
Max.
0.20
Low Level Output Voltage (V)
0.15
0.10
Max.
0.05 0.00 -50
0.05
-25
0
25
50
75
100
125
0.00 10 12 14 16 18 20
Temperature (oC) Figure 10A. Low Level Output vs.Tem perature
Vcc Supply Voltage (V) Figure 10B. Low Level Output vs. Supply Voltage
Offset Supply Leakage Current (uA)
Offset Supply Leakage Current (uA)
500 400 300 200 100
M ax.
500 400 300 200 100 0 0 100 200 300 400 500 600 VB Boost Voltage (V) Figure 11B. Offset Supply Leakage Current vs. Supply Voltage
Max.
0 -50
-25
0
25
50
75
100
125
Temperature (oC) Figure 11A. Offset Supply Leakage Current vs. Tem perature
11
IRS21853SPBF
400 VBS Supply Current (uA) 300 200 100
Max.
400 VBS Supply Current (uA) 300 200
Max.
100
Typ.
Typ.
0 -50
0 -25 0 25 50 75 100 125 10 12 14 16 18 20 Temperature (oC) Figure 12A. V BS Supply Current vs. Tem perature VBS Supply Voltage (V) Figure 12B. V BS Supply Current vs. Supply Voltage
600 Vcc Supply Current (uA)
600
400
Vcc Supply Current (uA)
400
Max.
200
Typ.
200
Max. Typ.
0 -50
-25
0
25
50
o
75
100
125
0 10 12 14 16 18 20
Temperature ( C) Figure 13A. V cc Supply Current vs. Tem perature
Vcc Supply Voltage (V) Figure 13B. V cc Supply Current vs. Supply Voltage
60
Logic "1" Input Current (uA)
60 Logic "1" Input Current (uA) 50 40 30 20 10
Typ. Max.
50 40 30 20
Max.
10
Typ.
0 -50
0
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature ( oC)
Figure 14A. Logic "1" Input Current vs. Tem perature
Vcc Supply Voltage (V) Figure 14B. Logic "1" Input Current vs. Supply Voltage
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IRS21853SPBF
10 Logic "0" Input Current (uA)
Logic "0" Input Current (uA)
10
8 6 4 2 0 -50
Max.
8
6
Max.
4
2
-25
0
25
50
o
75
100
125
0 10 12 14 16 18 20
Temperature ( C) Figure 15A. Logic "0" Input Current vs. Tem perature
Vcc Supply Voltage (V) Figure 15B. Logic "0" Input Current vs. Supply Voltage
12 Vcc UVLO Threshold (+) (V) 11 10 9 8 7 6 -50
Max.
12 Vcc UVLO Threshold (-) (V) 11 10
Max
Typ.
9
Typ.
Min.
8
Min.
7 6 -50
-25
0
25
50
75
100
125
-25
0
25
50
75
100
125
Temperature (oC) Figure 16. V cc Undervoltage Threshold (+) vs. Tem perature
Temperature (oC) Figure 17. V cc Undervoltage Threshold (-) vs. Tem perature
12 VBS UVLO Threshold (+) (V) 11 10 9 8 7 6 -50
Max.
12 VBS UVLO Threshold (-) (V) 11 10
Max
Typ.
9
Typ.
Min.
8
Min.
7 6 -50
-25
0
25
50
75
100
125
-25
0
25
50
75
100
125
Temperature (oC) Figure 18. V BS Undervoltage Threshold (+) vs. Tem perature
Temperature (oC) Figure 19. V BS Undervoltage Threshold (-) vs. Tem perature
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IRS21853SPBF
8 Output Source Current (A) 6 4
Typ.
8
Output Source Current (A) 0 25 50 75 100 125
6
4
2 0 -50
2
Typ.
0
-25
10
12
14
16
18
20
Temperature (oC) Figure 20A. Output Source Current vs. Tem perature
VBIAS Supply Voltage (V) Figure 20B. Output Source Current vs. Supply Voltage
8 Output Sink Current (A) 6
Typ.
8 Output Sink Current (A) 6 4
Typ.
4 2 0 -50
2 0
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature (oC) Figure 21A. Output Sink Current vs.Tem perature
VBIAS Supply Voltage (V) Figure 21B. Output Sink Current vs. Supply Voltage
0 Vs Offset Supply Voltage (V) -2
Typ.
-4 -6 -8 -10 -12 10 12 14 16 18 20 VBS Floting Supply Voltage (V) Figure 22. Maxim um V S Negative Offset vs. Supply Voltage
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IRS21853SPBF
NOTES: 1. DIMENSIONING & TOLERANCING PER ANSI Y14.5W-1982 2. CONTROLLING DIMENSION. MILLIMETER 3. DIMENSIONS ARE SHOWN IN MILLIMETER [INCHES] 4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AC 5. DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE 6. DIMENSION DOES NOT INCLUDE MOLD PROTUSIONS. MOLD PROTUSIONS SHALL NOT EXCEED 0.15 [.006]
16-Lead SOIC (narrow body)
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IRS21853SPBF
LOADED TAPE FEED DIRECTION
B
A
H
D F C
NOTE : CONTROLLING DIM ENSION IN M M
E G
CARRIER TAPE DIMENSION FOR Metric Code Min Max A 7.90 8.10 B 3.90 4.10 C 15.70 16.30 D 7.40 7.60 E 6.40 6.60 F 10.20 10.40 G 1.50 n/a H 1.50 1.60
16SOICN Imperial Min Max 0.311 0.318 0.153 0.161 0.618 0.641 0.291 0.299 0.252 0.260 0.402 0.409 0.059 n/a 0.059 0.062
F
D C E B A
G
H
REEL DIMENSIONS FOR 16SOICN Metric Imperial Code Min Max Min Max A 329.60 330.25 12.976 13.001 B 20.95 21.45 0.824 0.844 C 12.80 13.20 0.503 0.519 D 1.95 2.45 0.767 0.096 E 98.00 102.00 3.858 4.015 F n/a 22.40 n/a 0.881 G 18.50 21.10 0.728 0.830 H 16.40 18.40 0.645 0.724
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IRS21853SPBF
ORDER INFORMATION
16-Lead SOIC IRS21853SPBF 16-Lead SOIC Tape & Reel IRS21853STRPBF
SO-16N package is MSL3 qualified. This product has been designed and qualified for the industrial level. Qualification standards can be found at IR's Web Site http://www.irf.com/
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105 Data and specifications subject to change without notice 06/28/2007
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